Thanh-Tung Le

Ph.D. candidate at Virginia Tech
tungle@vt.edu | CV | | | |

I am a fifth-year Ph.D. candidate in the Department of Computer Science at Virginia Tech, advised by Dr. Thang Hoang. Prior to starting my Ph.D., I was an FPGA Engineer developing 5G NR Physical Layer at Viettel High Technology Industries Corporation. I completed my B.Sc. degree in Computer Engineering from Hanoi University of Science and Technology.

My Ph.D. research has centered on Applied Cryptography, Computer Security and Privacy, with a primary focus on Searchable Encryption, Multiparty Computation, Oblivious RAM, and Verifiable Computation. I am also interested in designing hardware accelerators using FPGA and GPU technologies, particularly for applications in Cryptography and AI/ML.

News

    09/19/25: I will
    07/08/25: I will join as an Applied Scientist Intern in Fall 2025!
    03/12/25: I will join as a Ph.D. Software Engineer Intern in Summer 2025!
    03/10/25: Our paper “Hermes: Efficient and Secure Multi-Writer Encrypted Database” was accepted at IEEE S&P (Oakland) 2025!
    12/17/24: I passed the Ph.D. Preliminary Exam! [slides]

Projects

MUSES

Efficient Multi-User Searchable Encrypted Database.
A multi-server searchable encrypted system with multi-writer support. It hides all statistical information including search, result and volume patterns while achieving minimal user overhead for keyword search and key rotation. My artifact has been awarded all three badges (available, functional, reproducible) at USENIX Security 2024.
Publications
MUSES: Efficient Multi-User Searchable Encrypted Database
USENIX Security Symposium (USENIX Security) 2024
Code
vt-asaplab/MUSES
Efficient Multi-User Searchable Encrypted Database
Slides
USENIX Security '24 Presentation
August 2024

Porla

Efficient Dynamic Proof of Retrievability for Cold Storage.
A proof of retrievability protocol that minimizes audit cost in terms of audit bandwidth and server/client computation. To achieve this, Porla leverages incrementally constructible code, a type of error-correcting code that efficiently supports updates, and verifiable computation techniques, including Bulletproofs and KZG.
Publications
Efficient Dynamic Proof of Retrievability for Cold Storage
Annual Network and Distributed System Security Symposium (NDSS) 2023
Code
vt-asaplab/porla
Efficient Dynamic Proof of Retrievability
Slides
NDSS '23 Presentation
March 2023
Poster: CCI Student Researcher Showcase 2023
April 2023

Hermes

Efficient and Secure Multi-Writer Encrypted Database.
A multi-writer searchable encrypted database that prevents keyword-guessing attacks, achieves optimal (sublinear) search complexity in keyword set size, and ensures forward privacy while maintaining user efficiency through a tree-based epoch encoding technique.
Publications
Hermes: Efficient and Secure Multi-Writer Encrypted Database
IEEE Symposium on Security and Privacy (Oakland) 2025
Code
vt-asaplab/Hermes
Efficient and Secure Multi-Writer Encrypted Database
Slides
Oakland '25 Presentation
May 2025
Oakland '25 Q&A Poster
May 2025

MAPLE

Metadata-Hiding Policy-Controllable Encrypted Search Platform with Minimal Trust.
A multi-server searchable encryption design attaining a high level of security. It protects search, result and volume patterns under malicious adversaries, supports multi-user with fine-grained access control, also optimizes server-side computational complexity.
Publications
MAPLE: A Metadata-Hiding Policy-Controllable Encrypted Search Platform with Minimal Trust
Privacy Enhancing Technologies Symposium (PETS) 2023
Code
vt-asaplab/MAPLE
Metadata-Hiding Policy-Controllable Encrypted Search Platform
Slides
PETS '23 Presentation
July 2023

FPGA/Embedded System Design

Digital Signal and Image Processing on FPGA.
An IP core implementing the Digital Detail Enhancement algorithm designed to enhance the quality of infrared images and videos. The algorithm consists of multiple stages of convolution and histogram-based computations of input frames with fully pipelined processing.
Publications
Implement Detail Enhancement Algorithm on FPGA for Real-Time and Energy-Efficient Embedded Systems
IEEE International Conference on Communications and Electronics (IEEE ICCE) 2020
Slides
IEEE ICCE '20 Presentation
Jan 2021

Publications

Hermes: Efficient and Secure Multi-Writer Encrypted Database [paper] [code] [slides] [talk]
Tung Le, and Thang Hoang
IEEE Symposium on Security and Privacy (Oakland) 2025

MUSES: Efficient Multi-User Searchable Encrypted Database [paper] [artifact] [code] [slides] [talk]
Tung Le, Rouzbeh Behnia, Jorge Guajardo, and Thang Hoang
USENIX Security Symposium (USENIX Security) 2024

Efficient Dynamic Proof of Retrievability for Cold Storage [paper] [code] [slides] [talk]
Tung Le, Pengzhi Huang, Attila A. Yavuz, Elaine Shi, and Thang Hoang
Annual Network and Distributed System Security Symposium (NDSS) 2023

MAPLE: A Metadata-Hiding Policy-Controllable Encrypted Search Platform with Minimal Trust [paper] [code] [slides] [talk]
Tung Le, and Thang Hoang
Privacy Enhancing Technologies Symposium (PETS) 2023

Implement Detail Enhancement Algorithm on FPGA for Real-Time and Energy-Efficient Embedded Systems [paper] [slides]
Le Thanh Tung, Le Thanh Bang, Pham Trong Thuy, Nguyen Duc Hoan, and Vuong Dang Huy
IEEE International Conference on Communications and Electronics (IEEE ICCE) 2020

Graduate Teaching Assistant

CS5594: Blockchain Technologies (Graduate Level)
Spring 2024 (53 students)

CS5584: Network Security (Graduate Level)
Fall 2023 (46 students)

CS1044: Introduction to Programming in C (Undergraduate Level)
Spring 2022 (69 students)

CS3114: Data Structures and Algorithms (Undergraduate Level)
Fall 2021 (414 students), Fall 2024 (481 students)